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Niko3's avatar
Niko3
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Quartus II simulation: missing max3000a_ver and output pin stuck at ground

Hi, I am a beginner with Quartus. I use Quartus II 13.0sp1 because I want to use a chip from MAX3000A family. Later versions don't support MAX3000A. To start with a simple design I tested the follo...
SyafieqS's avatar
SyafieqS
Icon for Super Contributor rankSuper Contributor
2 years ago

Let me know if previous suggestion resolve your issue.

Niko3's avatar
Niko3
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

I found another solution: I changed the design to a synchronous clear of the counter which works.

I guess that the advised syn_keep attribute shall be used within a VHDL description of the circuit. But I am testing with the schematic editor and don't know how to get VHDL from it.

If Quartus II can provide such a function it would be very helpful also for other purposes, e.g. for creating a test bench.