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Altera_Forum
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12 years ago

Quartus 14.0 Clock generation

Hello All, So i have a prototype where we use a 27MHz clock. A problem we are having is that Qsys can't make all the clocks. We can boot as far as UBOOT from NOR flash with CSEL on "10" with ...
Altera_Forum's avatar
Altera_Forum
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12 years ago

You have used the standard Altera GHRD with/without some changes on Altera CV SoC board ?

Or board is self-made ?

On previous versions of Quartus: 13.1, 13.0sp1, 13.0 also was problems ?

We recompile GHRD in 13.1 with small changes successful.