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NShin3's avatar
NShin3
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7 years ago

Qsys/Platform Designer does not generate submodule files when using two Avalon MM Slaves

I have created custom Avalon MM slaves. I want to connect them to a Master. The Qsys/Platform Designer tool does not generate submodule files when more than one Avalon slaves are connected to Avalon...
NShin3's avatar
NShin3
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7 years ago

Hello Anand,

I followed this process but still have the same problem.

Image 1 : Single Avalon MM slave.

-- Submodules folder generated with all sub files.

-- inst file is also generated.

Image 2 : Two Avalon MM slaves.

-- No Submodules folder generated.

-- No inst file.

-- Only QIP file.

Thanks and Regards,

Niranjan

NShin3's avatar
NShin3
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7 years ago

Hi,

I followed this same document to create custom components.

Only difference is I am using conduit signals to get data from FPGA modules instead of instantiating inside slave MM interface.

I have shared verilog files of master and slaves in the comments below.

Thanks and regards,

Niranjan