Altera_Forum
Honored Contributor
12 years agoQsys tutorial modelsim simulation problem
Hi,
I'm running through the simulation chapter of the Qsys System Design tutorial and i'm running into problems compiling the generated system verilog module. Most of the load_sim.tcl are getting executed except when it reaches this line: vlog -sv ./test_program.sv -L pattern_generator_tb_csr_master Has someone seen this and know how i can fix it? I'm new to Qsys and System Verilog and would appeciate some guidance on how to fix my problem so that i can progress and try out modifying the system verilog test bench. Below is a portion of the error messages i get on Modelsim, Thanks # Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov 2 2012# -- Compiling module test_program# ** Error: (vlog-19) Failed to access library 'pattern_generator_tb_csr_master' at "pattern_generator_tb_csr_master".# # No such file or directory. (errno = ENOENT)# ** Error: (vlog-19) Failed to access library 'pattern_generator_tb_csr_master' at "pattern_generator_tb_csr_master".# # No such file or directory. (errno = ENOENT)# ** Error: ./test_program.sv(21): Could not find the package (verbosity_pkg). Design read will continue, but expect a cascade of errors after this failure. Furthermore if you experience a vopt-7 error immediately before this error then please check the package names or the library search paths on the command line.# ** Error: (vlog-19) Failed to access library 'pattern_generator_tb_csr_master' at "pattern_generator_tb_csr_master".