Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Qsys - 64-bit masters and PIO

Hi.. I've come across a very annoying Qsys issue and was wondering if anyone had a workaround...

I have many (20+) PIOs instantiated for system control. These were correctly mapped as 0x0 - 0xf bytes.

Now I've added a frame buffer block which has 64-bit masters. Now all the PIO address ranges have doubled to 0x0 - 0x1f and I have a bunch of address range collisions.

I'm hoping I don't have to change my whole address map and cause lots of grief for the existing S/W and documentation. I have no intention of connecting the 64-bit masters to the PIOs.. Can I get the PIOs to keep their original address width mapping?

thx,

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Some more info.. It seems this is a result of some components (PIO and some other VIP blocks) using native addressing. In effect the slaves double their required memory space to accompdate the larger master.

    Is there anyway in QSYS to disable the larger master from affecting the "native addressed" slaves?