Devin2
New Contributor
1 year agoPWM outputs spike on startup of MAX10
I am using the PWM outputs on a MAX10 FPGA (the 10M50SAE144C8G) as triggers for the gate drivers in my H bridge circuit. I'm finding that on initial powerup of the circuit before my software starts running, the FPGA is producing voltage spikes with seemingly random timing. This could cause current shoot through on my H bridge if the wrong ones turn on at the same time. Are there any configuration settings in Quartus or a software approach that would keep the PWMs low during startup?