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Altera_Forum
Honored Contributor
17 years agopulse generation
Hello Forum, I have an application that requires me to produce 2.5 - 3.5nS pulses from externally generated edges. Our target device is a Cyclone 1C6 and SW Quartus 7.2. In the IOE descript...
Altera_Forum
Honored Contributor
17 years agoto jakobjones (http://www.alteraforum.com/forum/member.php?u=2226), thanks yes I am trying to produce a single pulse and one at 3nS would be perfect. I have been using the solution that FvM suggests with logic cells in the delay path from input pin and other path direct to logic. I was trying to defeat the optimizer from balancing the 2 paths for a little more control.
I will try the code too. I appreciate all your comments.