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Altera_Forum
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14 years ago

Programming config flash

My project uses a Cyclone IV. For manufacturing I made a bed-of-nails tester driven by an XJTAG tool (XJLink) and software. I would like to program the config flash during the test process, AS mode. DCLK appears to be a problem in that it is not accessible from boundary scan. Some possibilities are:

1. Use Jam STAPL or equivalent and mimic ByteBlaster. Seems complicated.

2. XJLink has GPIO pins that could tie to the flash pins and bit-bang program it. Would DCLK be an input if I drove nCE high so that it would not interfere?

3. Can CLKUSR be used to drive DCLK to program the flash? Then use XJLink as above.

It really seems odd to make DCLK not accessible from boundary scan, or am I missing that all important paragraph in the manual.

I saw a thread about DCLK and the BSDL file but my file doesn't seem to have this option.

Thanks for your help,

Tom

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    --- Quote Start ---

    My project uses a Cyclone IV. For manufacturing I made a bed-of-nails tester driven by an XJTAG tool (XJLink) and software. I would like to program the config flash during the test process, AS mode. DCLK appears to be a problem in that it is not accessible from boundary scan. Some possibilities are:

    1. Use Jam STAPL or equivalent and mimic ByteBlaster. Seems complicated.

    2. XJLink has GPIO pins that could tie to the flash pins and bit-bang program it. Would DCLK be an input if I drove nCE high so that it would not interfere?

    3. Can CLKUSR be used to drive DCLK to program the flash? Then use XJLink as above.

    It really seems odd to make DCLK not accessible from boundary scan, or am I missing that all important paragraph in the manual.

    I saw a thread about DCLK and the BSDL file but my file doesn't seem to have this option.

    Thanks for your help,

    Tom

    --- Quote End ---

    Bumping this thread, because I'm having the same issue with my JTAG software. The closest solution I can find is in the link below. This doesn't help me though because the DCLK pin is set as a linkage bit and not an input.

    http://altera.us/support/kdb/solutions/rd06012006_957.html
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    --- Quote Start ---

    My project uses a Cyclone IV. For manufacturing I made a bed-of-nails tester driven by an XJTAG tool (XJLink) and software. I would like to program the config flash during the test process, AS mode. DCLK appears to be a problem in that it is not accessible from boundary scan. Some possibilities are:

    1. Use Jam STAPL or equivalent and mimic ByteBlaster. Seems complicated.

    2. XJLink has GPIO pins that could tie to the flash pins and bit-bang program it. Would DCLK be an input if I drove nCE high so that it would not interfere?

    3. Can CLKUSR be used to drive DCLK to program the flash? Then use XJLink as above.

    It really seems odd to make DCLK not accessible from boundary scan, or am I missing that all important paragraph in the manual.

    I saw a thread about DCLK and the BSDL file but my file doesn't seem to have this option.

    Thanks for your help,

    Tom

    --- Quote End ---

    Bumping this since I'm having the same issue. The closest solution I've found is in the link below. It won't work for me though since the Dclk pin is defined as a linkage bit and I don't know what the associated BSR are.

    http://altera.us/support/kdb/solutions/rd06012006_957.html