Forum Discussion
Altera_Forum
Honored Contributor
16 years agoThe "In-system memory content editor" is just for debugging the memory content as the name says, but I'll try .. (I already have on-chip memory and the reset vector set to its address)
Altera told me that it *might* be a problem with the clock and/or the reset pin (the problem is that I have a custom board and the documentation is not the best one) I connected the reset to VCC and the clk_0 to an external clock. I thought that's enough but apparently I need a second clock for the JTAG. I dunno how I can assign the JTAG to an extra clock since there are only clk_0 and reset_n in my block diagram. So how can I add a clock for JTAG? If you like I can post a screenshot of my (very simple) block diagram and the SOPC system Thanks for your help guys .. ;-)