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Altera_Forum's avatar
Altera_Forum
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10 years ago

program/erase MAX II with TDO disabled?

I think I messed up and bricked my board, but I'm open to ideas. Here's the scenario:

My board uses the EPM240 in the 100-pin micro BGA package. There are no other JTAG devices in the chain, so the JTAG signals go to a 10-pin connector to mate to a USB Blaster. To make PCB layout easier, the TDO pin is routed through an unused (tri-stated) GPIO pin. Everything was working well, I could program and operate the device without any problems.

At one point in the debugging cycle, I decided to use the GPIO pin connected to the TDO pin to bring out a signal for testing (easy access via the JTAG connector for a scope probe.) That also worked, except now I can't get the USB Blaster to recognize the device, presumably because the TDO line is driven low by the GPIO pin.

I have the DEV_CLRn pin set up for a device-wide reset, so I tried holding it low while powering up, but that didn't work. I suspect this also holds the JTAG pins in reset, defeating the ability to communicate.

I don't have the DEV_OE pin enabled for device-wide operation, and probably couldn't get to that pin even if I did.

I think that if I can get the current program out of there, I would once again have normal operation of the TDO line. Is there any way to erase or reprogram the device without the functionality of the TDO pin? Can this be done with a USB blaster, or would I have to use another JTAG programmer? Please don't tell me I just turned my CPLD into an OTP device...

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    You may not have 'bricked' your board. However, driving a GPIO into TDO is not the smartest thing to do - I suspect you've realised that now...

    With both your GPIO output signal and TDO driving the same net, your Blaster can't make any sense of what it's receiving. You are going to have to cut the track from the GPIO pin to disconnect it from TDO. You must clearly leave the TDO track to your header intact.

    Hopefully, the drive strength of the GPIO isn't enough to damage the TDO driver. Providing that's the case I'd expect your board to spring back into life.

    Cheers,

    Alex
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    have you asked board's vendor?

    Why did you so?!

    from MAX II Device handbook:

    --- Quote Start ---

    Programming with External Hardware

    MAX II devices can be programmed by downloading the information via in-circuit

    testers, embedded processors, the Altera® ByteblasterMV™, MasterBlaster™,

    ByteBlaster™ II, and USB-Blaster cables.

    BP Microsystems, System General, and other programming hardware manufacturers

    provide programming support for Altera devices. Check their websites for device

    support information.

    --- Quote End ---

    i know that in max10 there is separate jtagen pin to distinguish gpio and jtag on the smae pins,

    but in max2 all jtag pins are dedicated according to handbook.

    shoud you paraphrase question like "how to progam device without jtag tdo line in device"

    if it possible put you gpio in tristate.

    or write your own driver that provide expected values from tdo line to software. so you should return to the first sentence.
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    --- Quote Start ---

    You may not have 'bricked' your board. However, driving a GPIO into TDO is not the smartest thing to do - I suspect you've realised that now...

    With both your GPIO output signal and TDO driving the same net, your Blaster can't make any sense of what it's receiving. You are going to have to cut the track from the GPIO pin to disconnect it from TDO. You must clearly leave the TDO track to your header intact.

    Hopefully, the drive strength of the GPIO isn't enough to damage the TDO driver. Providing that's the case I'd expect your board to spring back into life.

    Cheers,

    Alex

    --- Quote End ---

    I can't cut the track. The GPIO pin is between the TDO pin and the header (which is why the signal was routed through it.) The track is under the BGA package.
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    --- Quote Start ---

    have you asked board's vendor?

    --- Quote End ---

    I am the board's vendor.

    --- Quote Start ---

    if it possible put you GPIO in tristate.

    or write your own driver that provide expected values from TDO line to software. So you should return to the first sentence.[/i]

    --- Quote End ---

    Working with what I have, I can't figure a way to put the GPIO lines in tristate without also disabling the JTAG lines. Worst case scenario is I have to send the board out to have the CPLD replaced, but I'm hoping to avoid that.
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    I'm afraid you're stuck. You could tri-state the GPIO pin if you had reliable access to JTAG, although I don't know how to, or even if you can with Altera's tools. Standard boundary scan tools, such as XJTAG, allow you to manipulate the I/O pins and more, including reprogramming the device with a design that doesn't drive that GPIO pin. This would allow you to regain access to your device - providing the TDO driver isn't damaged.

    However, these 3rd party tools rely on JTAG access, which is compromised on your board.

    Cheers,

    Alex