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Altera_Forum's avatar
Altera_Forum
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17 years ago

Process Wait Statement

Please help me!!! I use Process Statement for my project, but have error: In Process Statement, we just have only one Wait untill??? It is wrong or right??? please help me. Thanhks a lot. pro...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Hi there,

no offence but please get a book about VHDL, a students guide to VHDL or whatever (see Amazon: Ashenden => A Designer's Guide to VHDL) and get at least familiar with the basic concepts of VHDL and writing synthesizable code.

You should also become familiar with the basics of FSMs and FSMDs!

kind regards,

lestard