New ContributorI want to run my AFU in uClk_usr domain in the Streaming DMA AFU sample example. Please can you provide the steps that need to be followed in order to achieve this.
Thank you
Regular ContributorHi,
Could you try to download the official version and check if you can work with the latest AFU design?
Regular Contributor
New ContributorHi,
Upon checking, the "avst_decimator.sv" file does not have user clock as input in this version as well.
Thank you
Regular ContributorHi,
Sorry, I was looking at the wrong directory. After looking at the correct directory then I am able to find the file.
You can modify the file in ccip_std_afu.sv so that the AFU IP is using UserClk and not Pclk.
New ContributorHi,
We tried using uClk_usr instead of pClk in line 117 of "ccip_std_afu.sv" file. We got the following error when we ran the software in simulation mode:
Thank you
Regular ContributorHi,
It looks like the PCIe IP is using PCLK and the AFU is running using uclk_user which is not able to match the frequency. You will need to implement clock crossing to make sure that the clock is able to pass to the AFU design without any issue.
New ContributorHi,
Could you please list the steps in order to implement clock crossing.
Thank you
Regular ContributorHi,
After further checking, the rtl should not be change. You will need to modify the json file so that it is using uclk_usr. You may refer to "hello_mem_afu" example design json file.
New ContributorRegular ContributorHi,
Usually the AFU does not need to have a special SDC for it as it is covered in the default SDC.
New ContributorHi,
I tried using uClk_usr with the help of clock crossing module. I instantiated the clock crossing module in the ccip_std_afu.sv file and in spite of that, I got the "timing constraints not met" error. What is the reason for getting that error and how to rectify it?
Thank you
