Forum Discussion
Altera_Forum
Honored Contributor
14 years agoproblems: object "std_logic" is not declared
Hi; I try write a code for convert integer to ufixed: package my_data_types is type vector is array (natural range <>) of integer; type ufixed is array (natural range <>) of std_logic; ...
Altera_Forum
Honored Contributor
14 years agoWhat do you mean by "separate library imports for each package and entity"?
Thanks for reply