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Altera_Forum
Honored Contributor
14 years agoproblems: object "std_logic" is not declared
Hi; I try write a code for convert integer to ufixed: package my_data_types is type vector is array (natural range <>) of integer; type ufixed is array (natural range <>) of std_logic; ...
Altera_Forum
Honored Contributor
14 years agotype ufixed_array_t is array(natural range <>) of ufixed(3 downto -4);
signal a : ufixed_array_t(0 to 7); etc