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Altera_Forum's avatar
Altera_Forum
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13 years ago

Problem with state machine (AHDL)

Hi all,

i'm a newbie in ADHL programming and have a problem with the code of the state machine below. I tested it on my CPLD-Board (MAX II).

The machine works well when the signal "relais" is in LOW-state. When "relais" is on HIGH-state, i think the state machine doesnt jump in the "ignore" state.

I cant see the bug of the code.


SUBDESIGN ignore_signal
(
    comp_in, relais, reset, CPLD_CLK : INPUT;
    comp_out : OUTPUT;
    
)
VARIABLE ignore_machine : MACHINE WITH STATES(init, ignore, high, ignored);
        counter : DFF;
BEGIN
counter.clk = CPLD_CLK;
CASE ignore_machine IS
    WHEN init =>
        comp_out = GND;
        
        IF relais THEN
            counter = 0;
            ignore_machine = ignore;
        ELSIF comp_in THEN
            comp_out = VCC;
            ignore_machine = high;
        ELSE
            ignore_machine = init;
            
        END IF;
        
    WHEN ignore =>
        
        comp_out = GND;
        counter = counter+1;
        IF counter >= 1200000 THEN
            comp_out=VCC;
            IF comp_in THEN
                comp_out = VCC;
               ignore_machine = high;
       
           ELSE
               comp_out = GND;
              ignore_machine = ignored;
           END IF;
        ELSE
            ignore_machine = ignore;
            
        END IF;
        
    WHEN high =>
        comp_out = VCC;
        
        IF !reset THEN
            comp_out = GND;
            ignore_machine = init;
        ELSE 
            comp_out = VCC;
            ignore_machine = high;
        END IF;
        
    WHEN ignored =>
        comp_out = GND;
        IF comp_in THEN
            comp_out = VCC;
            ignore_machine = high;
        ELSIF !relais OR !reset THEN
            comp_out = GND;
            ignore_machine = init;
        ELSE 
            comp_out = GND;
            ignore_machine = ignored;
        END IF;
        
        
END CASE;
END;
        
        
        
            

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    first of all - AHDL is an old and now unsupported language. I highly suggest you move to a language that you can simulate, like VHDL or Verilog.

    Secondly, are comp_in and relais synchronous signals? if not, you may be getting glitches.

    And where is the synchronous register for the state machine?