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Altera_Forum
Honored Contributor
16 years agoThe IEEE.STD_LOGIC_ARITH and IEEE.STD_LOGIC_UNSIGNED libraries make it possible ;) I forgot to mention that in timing simulation everything is OK.
The IEEE.STD_LOGIC_ARITH and IEEE.STD_LOGIC_UNSIGNED libraries make it possible ;) I forgot to mention that in timing simulation everything is OK.