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JBouv2's avatar
JBouv2
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6 years ago

problem to program an arria10GX with active serial

Dear all,

I am working on a card based on ARRIA10GX.

I want to program the FPGA with the active serial configuration.

I programmed the flash memory (MT25QU01G) a first time but unfortunately the file was not good because now the FPGA performs an automatic reboot after error and I cannot access the FPGA through the JTAG.

my questions are:

- can we stop this cycling

- the FLASH memory (through the dedicated Active serial pins) can it access in another configuration mode

thank you

13 Replies

  • Hi,

    You mentioned that data pin is 1 when nCSO is 1 and data pin is 0 when nCSO is 0, are you saying AS_DATA1 pin as shown in user guide below:

    https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/a10_handbook.pdf

    if it so, then the problem might be due to the flash device itself or the bitstream. Because the data should be sending in appropriate format instead of HIGH all the time or LOW all the time.

    May i know have you tried to program JIC using our Quartus? This is to check if the bitstream generated is correct or not.

    Also, i would like to check, during the generation of RPD file. Have you selected the correct information? such as the correct flash device & also the configuration scheme which is Active Serial x1

    May i know have you followed this guideline as shown below when using generic serial flash IP?

    https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-gen-sfi.pdf

    You mentioned about taking control of JTAG chain by causing an error to it. Apologize that i dont understand about this. Are you saying that you want to access flash memory using JTAG such as using USB blaster II?

    Regards,

    Aiman

  • JBouv2's avatar
    JBouv2
    Icon for New Contributor rankNew Contributor

    Hi

    the problem is almost solved, I managed to access the flash memory and erase it. now when the power is turned on the FPGA does not reboot indefinitely. I think the other part of the problem is the generation of the .RPD file. and the sequence of my script there must not be in agreement I will check.

    actually on the oscilloscope I looked at the pin AS_DATA0.

    for the generation of the .RPD file the information is good except for the little / big endian coding I am no longer sure.

    No I do not access the FLASH by the JTAG, this one allows me to program the FPGA and to access the card therefore to the FPGA by a PCIe link to be able to execute my script

    thanks again for your time

    regards

  • Hi,

    Good to know that your issue is almost solve. If you have other question, do inform me. Else, i will proceed to close this case. Feel free to open a new case if this case is close if you have any inquiries.

    Thank you.

    Regards,

    Aiman