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KCole4
New Contributor
6 years agoProblem programming Cyclone 10 in PS Mode
I am not seeing the CONFIG_DONE signal go high from the Cyclone 10 FPGA when programming in PS mode from STM32 CPU. The nSTATUS pin toggles as expected after we toggle the nCONFIG pin, and does not...
a_x_h_75
Contributor
6 years agoTry reversing the order in which you playback the bits of each byte - perhaps the most likely.
Slow the clock further. More importantly ensure the data is setup sufficiently ahead of the clock edge. (A lack of errors - assuming the bit order is correct - suggests the clock-data relationship is probably fine.) Nevertheless, try clocking data in on the other edge.
Cheers,
Alex