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I have almost completed my design. Now I have the problem implementing it on the board. I guess the problem is because of FIR Megacore I am using. Could you please help me with implementing FIR Megacore on the board?
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No, not without an explanation of what you decided to design :)
Please explain your system-level design, and then people can help.
Before you work with the Altera tools, you need to design the filter(s).
For example, if you know the frequency of the signal you are trying to detect the power of, then your design could be implemented per the discussion in this thread;
http://www.alteraforum.com/forum/showthread.php?t=30284&page=3 I just posted a MATLAB script showing how to decimate a high-rate sampled signal, to a low-rate sampled signal. The script shows that the particular combination of filters meets the design requirements, however, the script is not an HDL implementation. The next task for the person I was responding to, is to go and implement these filters in CIC Compiler, and FIR Compiler II.
In your design, you would demodulate your received signal using the known frequency (generated using an NCO with quadrature outputs), low-pass filter and decimate (both the in-phase and quadrature components), and then calculate the power.
Cheers,
Dave
Honored Contributor
