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Altera_Forum
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16 years ago

Problem for simulate PLL with Modelsim-Altera

Problem of simulations Since block Diagram.bdf, I use Run gate-level simulation automatically from EDA simulat Tool of quartusII.7.2 Web Edition I can stimulate the PLL (Altera_mf, Altpll) ...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

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If you observe no output from the PLL without an error message, it's most likely due to the default resolution = ns vsim setting. It must be changed to resolution = ps to simulate a PLL.

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hello,

please can you tell me how can i change the resolution of simulator modelsim because whe i simulated the ALTPLL i met a problem and a warning was appeared "time unit 'ps' is less than the simulator resolution(1ns).

thank you an advance