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Altera_Forum
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16 years ago

Problem for simulate PLL with Modelsim-Altera

Problem of simulations Since block Diagram.bdf, I use Run gate-level simulation automatically from EDA simulat Tool of quartusII.7.2 Web Edition I can stimulate the PLL (Altera_mf, Altpll) ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

My block diagram is an example but it is simulate. I always do not see instanciations. I want to know if it is normal.