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Altera_Forum's avatar
Altera_Forum
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8 years ago

Port number limitation prevents my codes from compiling

I have two questions. What I want to do is : I want to send 144 8bit numbers from my computer to FPGA, and let the FPGA store the numbers in memory in the FPGA. And let the verilog bloc...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

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Thanks for your answer.

Actually, I don't have any knowledge about the connection(which connection I need to chhose), or how to transfer the data. I want to know the easiest way to transfer the data regardless of the connection. I will also search your suggestion "USB serial to UART slave connection".

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Well, I think that you need to figure out exactly what you want to do, and figure out an architecture that can do that. USB / serial UART communications has a significant performance limitation that may (or may not) be important for your application.

Or maybe in your DE1 SOC you want to have a more intelligent software subsystem that runs linux and interfaces over etherNet to transfer data from/to your host. Or maybe not even use the SOC CPU at all, and have your FPGA just be a dumb peripheral to an external PC via serial over USB.

SO I think you need to do a bunch of work to figure out what you want to do, at a high level, and design an architecture that can do it. Then start coding low level verilog ...