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Altera_Forum's avatar
Altera_Forum
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8 years ago

Port number limitation prevents my codes from compiling

I have two questions. What I want to do is : I want to send 144 8bit numbers from my computer to FPGA, and let the FPGA store the numbers in memory in the FPGA. And let the verilog bloc...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

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Thank you Carlhermann

Your suggenstion that receive the numbers through address is good solution for me.

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How do you physically expect to connect your FPGA to the PC? Thru a serial connection (like an RS232 link), or etherNet, PCI bus, or PCIE bus? Or as just some bits that you toggle in a GPIO port on an expander card?

Each of these methods have very different levels of performance and complexity. Just wondering.