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Altera_Forum
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14 years ago

Port Assignment Problem

I have two boards of Cyclone III EP3C120F780C7N, say board A and board B. I have developed USB device and ported to FPGA: I have two issues while mapping the assignments 1) The USB devic...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Sorry for the late reply,

we have the customised USB IP on FPGA.

If I use Port x, I am able to identify the USB device using libusb -vvv

and

not working means, if I use the same SOF file on port x different board of same kind. I am not able to enumerate or identify the USB device.

Can I know what might be the reason for this.

Thanks ,

Vijay K