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Altera_Forum
Honored Contributor
Honored ContributorPLL Tuning
Hello. I am slightly confused about tuning a PLL output for an SDRAM clock and wondered if someone here could answer a couple of questions. Following this example [http://www.altera.co.k...
Altera_ForumHonored Contributor
Honored ContributorHI.
I need the phase shift for Cyclone II EP2C35 Board. 50 MHz -3ns pll won't work.
