Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorPLL problem using LVDS RX and TX pins on the same bank in a Cyclone V
Hello all, I'm building a small loopback test setup, where I output data coming from a data pattern generated to a pair of LVDS signals (data & clock) and receive those same signals in another ...
Altera_ForumHonored Contributor
Honored ContributorBy the way, you could use duplex mode ALTLVDS instead of two separate TX and RX only ALTLVDS. Both the TX and RX can still work independently.
