Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

PLL output to general i/o pin

Quartus V7.2 SP2 Device EP3C25E144C8 I have a 48Mhz oscillator connected to the dedicated clock input pins CLK2 and CLk5. I also have a 23.5Mhz clock signal coming in on a standard i/o pin (p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Thanks FvM. Your suspicion was correct the 48MHz wasn't being generated correctly. Correcting the hardware has fixed the problem.