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Honored Contributor
Honored ContributorPLL is not working in Cylcone V GX (Using Integer PLL)
Hi, I have designed Customised board using Cyclone V GX FPGA. I have fed 25MHz oscillator to non-dedicated clock pin in FPGA. So i had incorporated ALCLKCTRL. The design flow 25MHz...
Altera_ForumHonored Contributor
Honored ContributorIf you must use a non-dedicated clock input pin, have you tried connecting to the PLL first instead of the clock control block? Why are you doing it in this order?
