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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

PLL cascading on Cyclone V - broken?

I'm trying to cascade 2 plls on the Cyclone V (5CEBA2F23C8). Both integer. I set the first to have a cascade_out and the 2nd to have adjpllin. Then I connect these. Even with an otherwise empty...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

A quick note that I found this is simply not needed on cyclone V, since its possible to connect the output of one pll to the input of another anyway. Which just simply works.

MSchulz's avatar
MSchulz
Icon for New Contributor rankNew Contributor
8 months ago

Hi,

i have a similar problem and connected the output of one CV pll with the input of another. Timing seems alright but obviously it fails - i think i didnt get the right frequency as NIOS II serial outputs are just hyroglyphs.

Did you find an example on how to build up such "cascaded PLLs" or how to constraint the timing?

Best regards,

Marco.