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Altera_Forum's avatar
Altera_Forum
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8 years ago

Please help with PLL

Hello! I'm trying to use PLL to increase frequency of my system. I use Quartus 17 and de0-nano-SoC board. Steps I did: 1. On my IP catalog I chose Altera PLL: https://screencast.com/t/nshqodh...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

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Yes, it works fine, when I use just clk (it comes from V11, https://screencast.com/t/bdsshstrk )

Is it true that pll_reset is not necessary to start pll?

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You better double check naming and mapping as I see some differences between your naming above and those in your pll link

reset is optional so you can keep it released for now but also add pll lock output to see if it works.