Place Stage Error(19724) on Arria 10 with Quartus Prime Pro 18.1

Hi Huseyin, hi Syafieq,

Thanks to both of you for your kind responses.

Unfortunately, I confirm that" set_global_assignment -name GLOBAL_PLACEMENT_EFFORT "OPTIMIZE FOR HIGH UTILIZATION" " did not help.

Like Huseyin, I can say that my problem was not related with the device size, because the logic utilization was around 30%.

I temporarily addessed this issue by reducing the hardware footprint of my design, specifically targeting the fanout of the concerned clocks. That is why I have not exprerimented the second suggestion very quickly.

With the complete design, I finally managed to fit without errors by promoting the concerned clocks to large periphery clocks : "set_instance_assignment -name GLOBAL_SIGNAL LARGE_PERIPHERY_CLOCK -to <clock_signal_name>".

I suppose it has the same kind of impact as your suggestion of enlarging clock regions with the CLOCK_REGION assignment.

Best regards,

Roland