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Altera_Forum
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16 years ago

Pin assignment in Quartus II

Hi all, After my design is added to the project if I tried to assign the pins automatically using compile Design option or I/O assignment analysis option available under compile design too...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

You can allocate the pins in the HDL

in SystemVerilog do:

module a(

(* chip_pin = "A13" *) input wire LVDS_RX,

(* chip_pin = "A14" *) output reg LVDS_TX);