Altera_ForumHonored Contributor16 years agoPin Assignment for Custom Component in SOPC I am working on DE3 board with Stratic III device on it. I have successfully written a piece of verilog code which deserializes the LVDS data coming from HSTC port (an external ADC ic connected to HS...Show More
Altera_ForumHonored Contributor16 years agoVersion 9 sp2 for both NIOS II and Quartus II. Sorry for not mentioning it in the post.
Recent DiscussionsHow to tell Quartus my Arria10 target system CLKUSR frequency is 100MHz?Agilex 3 PLL in Source Synchronous mode ?writing a word to cfm1 using on chip flash ip on max10MAX10 FPGA IOs not entering Tri-state (Hi-Z)To INTEL - Request for Compliance Data from your customer