Forum Discussion
Altera_Forum
Honored Contributor
9 years agoHello James,
I have to design a pid servo for power stabilization of the lasers . I have thought of the closed loop design involving the experiment and the feedback. I read your paper on the pid controller and was wondering about what should be the sampling interval for the integral component and how to implement it in vhdl. My ADC's and DAC's work at maximum frequency of 10 MHz and 25 MHz respectively. Does that mean for the PID , I can have a maximum frequency of 12.5 MHz (half the frequency of DAC). Secondly, how to use the inverse of this frequency (sampling interval) in the difference equation that you have given in your paper. Thanks.