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Altera_Forum
Honored Contributor
16 years agophase between 2 PLL's in different FPGA
Hello, I have a system with 2 FPGA's. In each FPGA I need a clock of 40MHz. I can generate it with a PLL in each board. My question is: If the 2 PLL's generate the 40MHz signal from...
Altera_Forum
Honored Contributor
16 years agoHello,
But they will not be completely asynchronous, because they use the same xtal for generate the output? Can I predict something about the difference of phase? Maybe is clear for you, but I am a beginner. Sorry. Thank you for your answer.