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Occasional Contributor

6 years ago

PCIe Endpoint to PCIe EndPoint communication

Is it possible to communicate between two pcie endpoint Hard IPs in FPGA. Do somebody tried it?Any references? the idea is to interface a PCIe device(can be a rootport) to pcie endpoint(in fpga) th...

JET60200

Contributor

6 years ago

hi Matt,

I'm also working on a " pcie endpoint" device design in Arria 10, can you point to me some “Gold Reference Design of A10 PCIE Endpoint design ”， which is appreciated very much.

Thanks

BoonT_Intel

Frequent Contributor

6 years ago

Hi you can get the reference design from this list:

https://www.intel.com/content/www/us/en/programmable/support/support-resources/intellectual-property/interface-protocols/pci-express/m-pci-express-refdesigns.html

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PCIe Endpoint to PCIe EndPoint communication

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