PCIe differential REFCLK connection from M.2 connector to an Agilex 5 device

Hi,

Please follow the guideline to do this.

https://www.intel.com/content/www/us/en/docs/programmable/813266/current/gts-transceiver-pins-42864.html

The intention to reduce the PCB size is understandable for such design. You may check more different clock components, either low power or ultra small size for example.

Regards,

Rong