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Altera_Forum
Honored Contributor
Honored ContributorPCIe design
Hi guys!! Well, I've got one DSP and one FPGA and I have to communite them by PCIe. My questions are: 1.- One of them must be a root port (and another one must be endpoint) ?...
Altera_ForumHonored Contributor
Honored ContributorIn which case use the DSP chip as the RC.
It's far harder to set up a root complex than an endpoint on the FPGA. So you are better off using the DSP chip which has already be set up to act as the RC than to try and spin your own.
