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Honored Contributor
Honored ContributorParallel Flash Loader for MAX V
Hallo I am trying to use the Parallel flash loader (IP) core for configuration of my FPGA using a flash device and MAX V CPLD. I have read the application note and have a understanding how to d...
Altera_ForumHonored Contributor
Honored ContributorYou create a project in Quartus and then add the IP from the IP catalog. Here is the user guide:
https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_pfl.pdf
