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NShan12's avatar
NShan12
Icon for Occasional Contributor rankOccasional Contributor
5 years ago
Solved

Output pin naming rules in sub-modules.

Hello, I have a FPGA project designed completely as schematic entry. There is a module instantiated at top level and the output of this module is a 12 bit vector with name "2pi". Compilation is thr...
  • SyafieqS's avatar
    SyafieqS
    5 years ago

    Hi Naveen,


    Even though the schematic can run through the compilation, it is not recommended to naming the variable starting with number. Try to declare the variable starting with alphabet and the follow up by number.


    Thanks,

    Regards


SyafieqS's avatar
SyafieqS
Icon for Super Contributor rankSuper Contributor
5 years ago

Hi Naveen,


Even though the schematic can run through the compilation, it is not recommended to naming the variable starting with number. Try to declare the variable starting with alphabet and the follow up by number.


Thanks,

Regards


NShan12's avatar
NShan12
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Hello @SyafieqS ,

Thank you. I will rename the variable names as suggested.