Output Linux´s Video to VGA controller in FPGA Fabric through AXI on CV SoC

Hi,

I had a similar task but with creating a soundcard driver: http://stackoverflow.com/questions/34575899/creating-a-simple-audio-driver-for-a-cyclone-v-soc-linux

The dummy driver (snd-dummy) proved to be very useful for such a task, maybe you should have a look in the kernel sources for something similar on the video side.

Some links which I found in a quick search:

linux framebuffer documentation (somewhat dated) (https://www.kernel.org/doc/documentation/fb/framebuffer.txt)

discussion on phoronix (http://www.phoronix.com/forums/forum/linux-graphics-x-org-drivers/x-org-drm/41971-how-to-make-framebuffer-look-like-a-real-monitor)

xf86-video-dummy (http://cgit.freedesktop.org/xorg/driver/xf86-video-dummy)

I don't know if anything of this really is "state-of-the-art", or if there is some other way to do it in current systems/kernels, though.

Good luck!

Regards,

Philipp

Hi, DE0 SOC has no RAM on fpga fabric, I read you write VGA is running fine, is taking image from memory or from pattern generator?

Supposed all is fine are you able to fill in memory of VGA to display a pattern like lines and or color bar?

If hardware is really ok then you need to prepare a cross development gcc chain to compile code on PC Host.

This scenario you write, compile, transfer and debug code on target acting as an emulator.

If Linux is running on FPGA enough space is available, map a network drive on FPGA linux so you can also launch XWindows from terminal and display on workstation, then all development can be done on ARM setting all library and environment on.

Choose your way and prepare compilers and library too then it is just question of software.

http://www.ibm.com/developerworks/library/l-arm-toolchain/

http://gnuarmeclipse.github.io/toolchain/install/

Are you confident on how to write device driver and Unix/Linux signalling?

Regards

Thank you Phillip !

I will try with audio first.

I know how to develop little loadable kernel modules but nothing more ...

In Rocketboards there is a linux distro modified for doing this with the sockit:

http://rocketboards.org/foswiki/view/projects/sockitlinarolinuxdesktop

" The video pipeline is implemented in the FPGA portion of the SoC using Altera's Video IP (VIP) suite. A frame buffer DMA component in the FPGA reads the video buffer information from DDR in the HPS and writes it into the video pipeline. A custom frame buffer driver was added to the kernel to support this."

I found this in rocketboards

http://rocketboards.org/foswiki/view/projects/sockitlinarolinuxdesktop

This project utilizes Arrow SoCKit to demonstrate the LXDE X11 interface running on the Altera Cyclone V SoC device. This project allows you to boot linux with the penguin on a desktop display and run X windows. This project can be built using the features of the 13.0 release.

The de0 nanoSoC does not have sram on fabric side but i can make a expansion breakout , adapted to the nano headers

http://www.play-zone.ch/en/waveshare-is62wv51216bll-sram-board.html or purchase a sockit.

But my goal it´s learn to do it for my own ...

Yes, i can output 1600 x 600 and i know hou to do litttle loadable kernel modules but this is more difficult

This project utilizes Arrow SoCKit to demonstrate the LXDE X11 interface running on the Altera Cyclone V SoC device. This project allows you to boot linux with the penguin on a desktop display and run X windows. This project can be built using the features of the 13.0 release.

http://rocketboards.org/foswiki/view/projects/sockitlinarolinuxdesktop

Hi nachodizz990,

thanks for the link to http://rocketboards.org/foswiki/view/projects/sockitlinarolinuxdesktop This could prove to be very useful for me as well, as I'm planning to do some video output in the future, though I'll try to use the MGTs for HDMI output. If it works at least, not sure about that yet...

Bye,

Philipp

--- Quote Start ---

The de0 nanoSoC does not have sram on fabric side but i can make a expansion breakout , adapted to the nano headers

http://www.play-zone.ch/en/waveshare-is62wv51216bll-sram-board.html or purchase a sockit.

But my goal it´s learn to do it for my own ...

Yes, i can output 1600 x 600 and i know hou to do litttle loadable kernel modules but this is more difficult

--- Quote End ---

Hi, good job, learning is forever more better than reusing without understanding.

Thank for link to prebuilt modules, I take an eye to what can save time, anyway in your project cannot be of help, that is an SRAM and is too slow for video access, an SDram DDR is better and cost much less than static.

I see you pointed to rocket board example, that help a lot building compilers chain but also has prebuilt drivers, what happen if you load that image on your board? I suppose you need adapt fabric and all I/O on QSYS to match DE Nano hardware too.

Tomorrow if I get some spare time I check on resources of arrow board compared to DE0 nano soc

What you can see on VGA screen? If you booted system, are you able to allocate a video buffer in the user memory then initialise DMA registers to display it?

Regards

--- Quote Start ---

Hi, good job, learning is forever more better than reusing without understanding.

Thank for link to prebuilt modules, I take an eye to what can save time, anyway in your project cannot be of help, that is an SRAM and is too slow for video access, an SDram DDR is better and cost much less than static.

I see you pointed to rocket board example, that help a lot building compilers chain but also has prebuilt drivers, what happen if you load that image on your board? I suppose you need adapt fabric and all I/O on QSYS to match DE Nano hardware too.

Tomorrow if I get some spare time I check on resources of arrow board compared to DE0 nano soc

What you can see on VGA screen? If you booted system, are you able to allocate a video buffer in the user memory then initialise DMA registers to display it?

Regards

--- Quote End ---

The arrow haves ddr3 mem in both hps and fpga fabric sides, i think that surely the video block uses the fpga ddr3 memory.

These example is useful to explore the kernel files and see how it works !!

I designed a expansion board (or cape) that fits perfectly with the nano soc, it includes an adv7123 video dac a wolfson audio codec but i will redesign it for adding a little ddr too(for the fpga side)

--- Quote Start ---

The arrow haves ddr3 mem in both hps and fpga fabric sides, i think that surely the video block uses the fpga ddr3 memory.

These example is useful to explore the kernel files and see how it works !!

I designed a expansion board (or cape) that fits perfectly with the nano soc, it includes an adv7123 video dac a wolfson audio codec but i will redesign it for adding a little ddr too(for the fpga side)

--- Quote End ---

Hi, it is not really necessary at normal resolution, if you wish have full HD or 4HD then a separate memory is better due memory channel bandwidth reduce processor speed too.

Memory of HPS can be accessed from FPGA and FPGA memory controller can be accessed from HPS too.

Which IP did you used for your design and how are they interconnected on QSYS?