Altera_Forum
Honored Contributor
9 years agoOne JIC file to multiple FPGAs
Hello!
I'm programming multiple FPGA devices of the same type with one image in one JTAG chain (programming file JIC). It seems that the quartus programmer is programming every FPGA by itself, which is working fine. Is there a way to just need to write the image once to the JTAG chain and all FPGAs on the chain use it as configuration? (And only verify device by device to get responses of success from all ;)) BR, Markus