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Altera_Forum
Honored Contributor
Honored ContributorOne JIC file to multiple FPGAs
Hello! I'm programming multiple FPGA devices of the same type with one image in one JTAG chain (programming file JIC). It seems that the quartus programmer is programming every FPGA by itself...
Altera_ForumHonored Contributor
Honored ContributorOk, seems like I mixed things up a little in my formulation.
I have one EPCS flash device per FPGA and I want them all to get the same image. Currently the programmer sequentially configures every FPGA with a boot image and the sequentially writes the desired data to every EPCS using this boot image. So to sketch the setup with three FPGAs: +------+ +------+ +------+ | EPCS | | EPCS | | EPCS | +------+ +------+ +------+ || || || +------+ +------+ +------+ --| FPGA |--| FPGA |--| FPGA |--+ +------+ +------+ +------+ | | --------------------------------+ ... all three EPCS devices should get the same image. Nevertheless thank you for your answer, it might be helpful in the future.
