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greenlantern01's avatar
greenlantern01
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

On-Chip Memory Read/Write Issue

Hello, I am using a DE10 Standard FPGA board along with DC2390 daughter card. I am trying to use a FIFO and On-Chip Memory (RAM or ROM) module together. Capture data from the FPGA, send that data t...
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Programmable Logic Device
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
1 year ago

Check the system.h file which is created as part of the second stage bootloader based on the .sopcinfo file. The header file includes all the macros needed for accessing components connected to the processor.

  • greenlantern01's avatar
    greenlantern01
    Icon for Occasional Contributor rankOccasional Contributor
    1 year ago

    Okay! I think I got it! Thank you!

    Do I need to mmap the second port of the sram as well? I only see a single base address for the sram.

    But in the qsys I see two addresses. (Shared above)

    Thanks

    • sstrell's avatar
      sstrell
      Icon for Super Contributor rankSuper Contributor
      1 year ago

      It's a true dual port RAM so the second port would get added to the header file as well.

      • greenlantern01's avatar
        greenlantern01
        Icon for Occasional Contributor rankOccasional Contributor
        1 year ago

        So I haven't built a bootloader for cyclone v.

        I have used the Angstrom Linux for the DE10 Standard FPGA, programmed the fpga from the quartus software. I access the linux on the board from putty, compiled the c code and copied it to the linux and then run it from there.

        Thus I never required to follow the bootloader steps and hence I am not sure if I am looking at the right header file. Can you direct me to some documentation which shows the method for creating these header files?

        Thanks in advance and appreciate your patience!