Forum Discussion
Altera_Forum
Honored Contributor
17 years agoon chip memory and ISR
Hi everyone, I am working with a cyclone II and NIOS II development kit.I wanna enhance the performance of my ISR. I read that I could do that by placing the ISRs and teh stack in the fastest avai...
Altera_Forum
Honored Contributor
17 years agoThank you very much for your answer. I have tried to create an linker script with sections of code and the place where the system should put my exceptions (so on my on-chip memory) but the results were quite strange:
I tried to measure the response of an excitation of my system (in fact a generator of pulse is connected to a GPIO, when an IRQ is produce, the code writes on another GPIO and I measure the time between the excitation and the response of the system). The thing is that it took more time when the exceptions were on the on-chip memory than on the sdram (when I used my linker script ). Is it normal? What is more, when I simply put on System Library properties the exception memory on on chip memory, it took less time than with my linker script. So the results were: exceptions on on-chip without linker script < exceptions on sdram < exceptions on on-chip WITH linker file Is it normal?? Thanks