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Altera_Forum
Honored Contributor
17 years agoon chip memory and ISR
Hi everyone, I am working with a cyclone II and NIOS II development kit.I wanna enhance the performance of my ISR. I read that I could do that by placing the ISRs and teh stack in the fastest avai...
Altera_Forum
Honored Contributor
17 years agoPlacing the exception vector in onchip memory will work in some cases. In some cases it will not work. You can explicitly assign code to reside in a specific memory section by using attributes in your C code. Refer the the "Memory Usage" chapter of the following section of the NIOS II literature:
http://www.altera.com/literature/hb/nios2/n2sw_nii52004.pdf Jake