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Altera_Forum
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17 years ago

on chip memory and ISR

Hi everyone, I am working with a cyclone II and NIOS II development kit.I wanna enhance the performance of my ISR. I read that I could do that by placing the ISRs and teh stack in the fastest avai...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

As Nios II doesn't have vectored interrupts, it should be enough with putting "Exception Vector", not "Reset Vector", at on-chip memory. In Nios II IDE you can mark the option "Use separate exception stack" at system library properties.