nStatus held low Cyclone IV EP4CE6E22

Hi Alain,

This may be because of noise in DCLK and DATA line/bus signals or Msel setting or pull-up/pull-down resistors (nCE, nCONFIG, nSTATUS and CONF_DONE pins).

1. Did you test .sof file programming via JTAG configuration?

2. Are MSEL pins are tied to the correct MSEL setting?

For FPGA Configuration Troubleshooter refer the below link.

https://www.altera.com/support/support-resources/support-centers/devices/cfg-index/fpga-configuration-troubleshooter.html

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)