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not_A_quitter's avatar
not_A_quitter
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3 years ago

Not getting the 3.3-V LVTTL and LVCOMS cyclone IV full range?

Hi, I’m using a cyclone IV FPGA (EP4CE55F23C8N) and I’m outputting a 48Mhz clock signal (generated by the internal PLLs) that feeds a microcontroller. The problem is I’m not getting the required 3....
ak6dn's avatar
ak6dn
Icon for Regular Contributor rankRegular Contributor
3 years ago

What are the characteristics of your scope probe and input?

Is it a high impedance or 50ohm termination that you have on your probe?

What is the input bandwidth of your scope channel?

A CycloneIV with LVTTL or LVTTL 3.3V output should be able to drive a 4ma to 8ma load (depending on drive selected) 48MHz (20ns period) with a 2ns to 3ns rise/fall time pretty much rail to rail.

  • not_A_quitter's avatar
    not_A_quitter
    Icon for New Contributor rankNew Contributor
    3 years ago

    You are right. I think the issue had to do with the probe bandwidth as a function of the probe multiplier. I had my probe set to x1 multiplier (no amplification no attenuation) which reduces the BW to 5Mhz according to probe the datasheet. By setting the probe to x10 i get 100Mhz BW. I did my measurements (pic attached) i got 400~500mVpp which translates to 5vpp after accounting for the probe multiplier.