not_A_quitter
New Contributor
3 years agoNot getting the 3.3-V LVTTL and LVCOMS cyclone IV full range?
Hi,
I’m using a cyclone IV FPGA (EP4CE55F23C8N) and I’m outputting a 48Mhz clock signal (generated by the internal PLLs) that feeds a microcontroller. The problem is I’m not getting the required 3.3 voltage level (using the 3.3-V LVTTL and LVCOMS), I get 1 vpp (peak to peak) on my oscilloscope.
I figured the problem is related to the FPGA current limiting circuitry. So I dabbled with lower voltage values like 3v,2.5v which offer higher current limits. But still I wasn’t able to squeeze out sufficiently high logic levels. The best I got was around 1.4vpp. Also I activated the internal weak pull up resistor with no significant improvement from the voltage level standpoint.
Any thoughts on how I can generate the 3.3v full range.